|
Issues Resolved in 14.19.50.4497
|
|
Reference
No.
|
Description
|
Affected
Component(s)
|
Affected
OS(s)
|
Affected
Project(s)
|
|
BugID: 1969098
|
BSOD when changing DVD movie title while Full DOS screen
open.
|
GDI
|
Windows* XP
|
Intel(R) 915GM Express Chipset, Intel(R) 945GM
Express Chipset, Intel(R) 915G Express Chipset, Intel(R) 945G Express
Chipset
|
|
Resolution Description:
Root Cause: When we go to
FSDOS, in the AssertMode call, we will make pSharedInfo NULL. When we eject
the current DVD which is playing and switch to a different DVD,
GHALInsertTag function will get a call to insert tag from a D3D function.
The D3D function will be in a while loop until the GHALInsertTag returns
True. But since sharedinfo is NULL, GHALInsertTag will keep on returning
false and this results in BSOD.
Fix Description: Do
not return false even when sharedinfo is NULL. Sufficient care is taken in
the function when sharedinfo is NULL.
|
|
BugID: 1966704
|
Desktop no longer pans after lid switch event while
panning.
|
SOFTBIOS
|
Windows* XP
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: In DrvMovePoniter (), if it is not a software
pointer, we do not check for panning case. We assume that a call will come
from moving the cursor with positive x and y. If so, changing the start
address in the display address register is fine. Now the issue happens when
DrvMovePointer() call may not come with positive x and y. If
DrvSetPointerShape() failed, OS may not call DrvMovePointer() with positive
x and y.
Fix Description:
Correct the code appropriately.
|
|
BugID: 1818391
|
For hide modes unchecked: Display comes in EDS LFP+CRT
even though the CRT was not connected while resume from hibernation.
|
CUICOM
|
Windows* XP
|
Intel(R) 915GM Express Chipset
|
|
Resolution Description:
Root Cause: When the
system is in EDT, if we suspend the system and disconnect one device, the
system stays in EDT when we resume because there is no signal that directs
OS and driver to take the system out of EDT.
Fix Description Two
new registry values are created for CUI. One to inform CUI when to switch
display to SPSD, and the other one gives the device UID for the display to
switch to. CUI reads the registry keys and switches to SPSD.
|
|
Issues Resolved in 14.19.50.4476
|
|
Reference
No.
|
Description
|
Affected
Component(s)
|
Affected
OS(s)
|
Affected
Project(s)
|
|
BugID: 1818391
|
Display comes
in EDS LFP+CRT when CRT is disconnected while resuming from hibernation.
|
MINIPORT
|
Windows*XP
|
Intel(R)
915GM Express Chipset
|
|
Resolution Description:
Root Cause: When the system is in EDT and you
suspend the system and disconnect one device, the system stays in EDT when
you resume because the OS and driver were not notified to take the system
out of EDT.
Fix Description:
|
|
BugID: 1964033
|
A green band
shown in the upper part of TV screen.
|
SOFTBIOS
|
Windows*XP
|
Intel(R)
945GM Express Chipset
|
|
Resolution Description:
Root Cause: When GDI viewport is different
than the mode to be set, the image should be centered.
Fix Description: This was taken care in old SB. But in new
SB, this was not done for IntTV encoder. The mode needs to be centered if
the GDI view port X or Y is less than that of the
Hactive or Vactive of the timing to be set. But
INTTVOUTENCODER_PreSetControllerTiming returns TRUE without doing any
check.
|
|
BugID: 1949389
|
Garbage
appears when moving the mouse on "AutoCAD2006."
|
GDI
|
Windows*XP
|
Intel(R)
945G Express Chipset
|
|
Resolution Description:
Root Cause: This application will send the
mix values to the stroke path function when we erase the lines and will
make the back ground of the erased line visible. Garbage is shown on the
screen according to the mix values. In stroke path function, we will punt
the entire call if any of the line (in multiple paths) view port is greater
than 2048. If we draw some paths using the hardware and then if we punt the
call because of the above reason, OS will redraw from the first path
onwards above the paths drawn by the hardware. Now if we move the figure,
while erasing the paths, the previously half drawn paths by the hardware will
be shown on the screen according to the mix values and becoming the
garbage.
Fix Description: Do not punt the entire stroke path if we
already had drawn some lines in the paths using hardware. Instead, just
draw that particular line (whose view port is greater than 2048) by calling
EngLineTo function. This will avoid the redrawing of the paths by OS which
were already drawn by the hardware.
|
|
Issues Resolved in 14.19.50.4473
|
|
Reference No.
|
Description
|
Affected Component(s)
|
Affected OS(s)
|
Affected Project(s)
|
|
BugID: 1964177
|
TV-OUT
switch failures with 14.19.50 build.
|
AIM
|
Windows*XP
|
Intel(R)
945G Express Chipset
|
|
Resolution Description:
Root Cause: A set timing call was missing
for Conexant TV-OUT which caused the issue.
Fix Description: Made appropriate changes for it.
|
|
BugID: 1765410
|
Unsupported
LFP refresh rate modes available.
|
GDI
|
Windows*XP
|
Intel(R)
915GM Express Chipset
|
|
Resolution Description:
Root Cause: If one of the device in DDC is a
legacy or if the hide modes check box is un-checked for DDC, then all the
combined modes are reported to either of the devices. Hence Primary and
Secondary mode table will have same X, Y, BPP, and RR. It may have those refresh
rates that are supported on the other displays and not supported on the
current display.
Fix Description: In DDC, hide modes un-checked
behavior for both Primary and Secondary report all the modes having X, Y,
and BPP in the combined mode list, but refresh rate is common between the
Single Display mode and Combined mode list.
|
|
BugID: 1943405
|
Tablet:
Can not execute Fn+F7 function after suspend and resume on extended desktop
mode.
|
GDI,
MNIPORT
|
TABLET
PC
|
Intel(R)
915GM Express Chipset
|
|
Resolution Description:
Root Cause: After a suspend resume operation
in extended desktop mode, when we try to go to single display, DisableSurface() call does not come. The expected call
sequence in this case is DrvAssertMode false and DisableSurface()
for secondary. This is a tablet PC OS issue. That is why the driver does not come out
of extended desktop and switch does not happen. There are basically 2 problems. 1)We do not see the complete menu for toggle sequence on
pressing Fn + F7, because scratch bit is not set. Scratch bit is used to
inform softbios and in turn bios about the SD and ED modes. That is
responsible for displaying the options when we press Fn + F7. The scratch
bit is set in DrvDisableSurface(). But since
DrvDisableSurface does not come. The scratch bit is not cleared. 2) If we
somehow set the scratchbit in Assertmode(false)
call, the complete menu of ACPI
devices is displayed with the DDC option but miniport does not allow the
switch as registry is still MDS.
Fix Description: Since this is an OS issue, the
following is only a workaround. 1) Made changes in DeAssertMode()
function. Inform softbios about mode change by clearing the scratch bit and
putting in DrvAssertMode(false). 2) Made changes
to EM_ACPI_HOTKEY_handler. The AttachToDesktop Key is properly set by OS to
indicate single display mode. Here OS thinks that is it out of extended
desktop but driver registry is not updated. So the fix is if
AttachToDesktop is 0 (SD) and driver’s config shows ED, then the current
configuration is set to SD. This is done in ACPI handler.
|
|
BugID: 1766227
|
Multi monitor
mode cannot be supported when using CUI menu.
|
CUI2
|
TABLET
PC
|
Intel(R)
915GM Express Chipset
|
|
Resolution Description:
Root Cause: Not able to switch to
multi-monitors configuration as the modelist returned in extended
desktop/clone/twin was pruned for modes below 800 x 600. Since the maximum
mode for this panel is 800 x 480, we were not
getting any modelist. Also required a change in cfg such that on
interchanging the devices in extended desktop the modelist of the Secondary
gets copied to the Primary and vice versa.
Fix Description: Issue has been fixed
appropriately in a way which will not affect any system.
|
|
BugID: 1766225
|
CUI does
not display current desktop mode information for 800x480 panel.
|
CUI2
|
Windows*XP
|
Intel(R)
915GM Express Chipset
|
|
Resolution Description:
Root Cause: CUI does not show modes for the
panel as we prune modes below 800 x 640.
Fix Description: Fixed the issue appropriately to
make sure that the fix is valid only for particular system and does not
affect other systems.
|
|
BugID: 1950107
|
When
repeatedly changing the resolution, the selectable resolution is lost.
|
CUICOM
|
Windows*XP, Windows Media* Center
|
Intel(R)
945GM Express Chipset
|
|
Resolution Description:
Root Cause: The issue happens because GDI
returns only 800 x 600 resolutions in DrvGetmodes call from OS. Since we
have rotation disabled in INF, OS calls DrvGetmodes with buffer that can
accommodate only non-rotated modes. In DrvGetmodes Fn while checking for
whether rotation is enabled, we have rotation enabled in registry. So GDI
reduces the buffer size four times inside DrvGetmodes. The
Display1_EnableRotation registry key is enabled temporarily by CUI during
the resolution change in the function PersistRotationEnabledStatus().
Whenever CUI wants to get the current rotation angle, it enables rotation
temporarily. Within that period if GDI looks at the registry, it finds
rotation enabled.
Fix Description: While checking current rotation
angle, if the rotation capabilities are 0, do not check for current
rotation angle and send the default value.
|
|
Issues Resolved in 14.19.50.4470
|
|
Reference No.
|
Description
|
Affected Component(s)
|
Affected OS(s)
|
Affected Project(s)
|
|
BugID: 1738708
|
The
incorrect information is detected in the IGT page after switching the display
mode to TV mode by pressing ACPI hotkey twice on LFP+ CRT DDT mode.
|
MINIPORT
|
Windows* XP
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset,
Intel(R) 915GM Express Chipset, Intel(R), Intel(R) 955GM Express Chipset
|
|
Resolution Description:
Root Cause: We do not clear the registry
for DISPLAY1_UID2 (i.e. Twin Registry) when switching from Twin to SPSD
using hotkey. While going to SPSD, the registry of primary display and the configuration
registry are cleared but not applied to the registry for secondary. Now CUI
gets confused because it sees DISPLAY1_UID2 not equal to zero in SPSD
configuration.
Fix Description: During registry update in
EMSetNextConfiguration, update the values of relevant registries and make
all other registry values equal to zero. By doing this, CUI will not be
confused while switching from Twin to SPSD since we will clear
DISPLAY1_UID2. To fix the problem of registry for secondary getting
overwritten in SET MODE PRIMARY HANDLER, once the next configuration is
received from Event Manager the same current configuration is not updated
in the registry.
|
|
BugID: 1944241
|
LFP is blank
or pans after removing CRT while in S3.
|
CUI2
|
Windows* XP
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: If the modes returned are different,
ENUM_REGISTRY_SETTINGS data is taken as the current config. In these
scenarios, the panning mode is returned in ENUM_CURRENT_SETTINGS and the
actual mode (which is also stored in the persistence registry) is returned
in ENUM_REGISTRY_SETTINGS. So the persistence functions think the current
mode is same as the mode that need to be applied
from registry. That’s why it does not run ApplyConfig. So
SyncOSAndDriverThread is not started. When log in happens, the event is not
processed by persistence.
Fix Description: While comparing the
configuration, current config is taken from CUI Service method and config
to apply is taken from persistence method GetCurrentConfig. A new function
is introduced to verify if these two configs are the same or not. Also the
logic used in GetCurrentConfig is modified to rectify the issues that can
be faced due to usage of EDS call for Display2 in non-MDS case.
|
|
BugID: 1950632
|
Running hardware
overlay like Mosquito.exe in panning mode this will give rise to BSOD.
|
DD
|
Windows* XP
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset,
Intel(R) 915GM Express Chipset, Intel(R) 915G Express Chipset, Intel(R)
955GM Express Chipset
|
|
Resolution Description:
Root Cause: The problem is from the
inconsistent coding mechanisms between view port rect and overlay rect to calculate
the right position through the addition of the left position and the width.
The same issue also happens to the bottom position with the addition of the
top and the height.
Fix Description: The codes to add one to the
overlay destination in DCN 447071 will be removed to fix this issue.
|
|
BugID: 1951199
|
On HDTV,
we need to hit restore button twice to restore the default settings.
|
TVOUT
|
Windows* XP
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: The calculation to obtain the
default x and y in IntTV_GetSTDTVParameters is not consistent with the
calculation of position in IntTV_SetPositionByPct.
Fix Description: Modified the calculation to have
the two functions in sync.
|
|
BugID: 1950603
|
A blank
screen is displayed on LFP after switching the display to LFP only mode.
|
SOFTBIOS
|
Windows* XP
|
Intel(R) 945G Express Chipset
|
|
Resolution Description:
Root Cause: System BIOS reports lid state as
lid closed on a desktop system (Lakeport). Hence, LVDS port was getting
turned off.
Fix Description:
|
|
BugID: 1949418
|
If
Driver was installed, resolution becomes "640x480 4bit."
|
SOFTBIOS
|
Windows* XP
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: The Panel is 12x8 and in OEM
mode addition list there is 12x8 timings. While building the mode table OEM
mode overwrites the 12x8 timings obtained from panel specific VBT block.
But m_stLVDSTimings contains the timing obtained from the panel timings;
hence in INTLVDSENCODER_IsTimingSupported all modes get trimmed.
Fix Description: Give priority to the EDID mode
over OEM mode.
|
|
BugID: 1950613
|
Advance seting
for CRT in DDC mode cannot be hidden by CUI customization.
|
CUI2
|
Windows* XP
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: Wrong placement of customization
of advance settings in clone.
Fix Description: Corrected this and added an else
condition for hiding the button if registry entry is NULL.
|
|
BugID: 1939497
|
TV Settings
display will shift to right when we hit left.
|
CUI2
|
Windows* XP
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: Default value is not a multiple
of the step size returned; hence we were overshooting the max size or going
to a negative value when moving. Added checks to prevent this from
happening.
Fix Description:
Made appropriate changes in the data types.
|
|
Issues Resolved in 14.19.50.4465
|
|
Reference No.
|
Description
|
Affected Component(s)
|
Affected OS(s)
|
Affected Project(s)
|
|
BugID: 1642439
|
Position
Button in TV setting grayed out when tried to apply horizontally.
|
AIM
|
Windows* XP
|
Intel(R) 955GM Express Chipset
|
|
Resolution Description:
Root Cause: When over-scanned
horizontal/vertical values entered, current position value changes with the
CUI, but not within the driver's position ranges on Chrontel cards.
Fix Description: Added variables to store
PositionX range and PositionY range as current position ranges for CUI. Now
new position value is calculated in the current range.
|
|
BugID: 1625330, 1644688
|
Display
becomes unusual in GL_Excess.
|
OGL
|
Windows* XP
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset,
Intel(R) 915GM Express Chipset, Intel(R) 915G Express Chipset, Intel(R)
955GM Express Chipset
|
|
Resolution Description:
Root Cause: Buffer_Info has set a wrong
pitch at __glSrvFlipToPrimary(). GDI has already implicitly
flipped so that "pSharedInfo->ulDispPitch" hold the correct
pitch.
Fix Description: We save dwModeStateSeqTag at buffer creation time
and check to see if it is changed before flipping in __glSrvFlipToPrimary().
|
|
Issues Resolved in 14.19.50.4460
|
|
Reference No.
|
Description
|
Affected Component(s)
|
Affected OS(s)
|
Affected Project(s)
|
|
BugID: 1704170
|
Divide
by zero error.
|
AIM
|
Windows
Media* Center, Windows*XP
|
Intel(R) 955GM Express Chipset
|
|
Resolution Description:
Root Cause: GetOemScalingData function is using
a zero value for vga_pixels as a divisor.
Fix Description: Added a condition to check vga_pixels for
zero value and ensured that 'divide by zero' error does not occur.
|
|
BugID: 1604205
|
Changes to
support Integrated Scalar in Gen4 platforms.
|
GDI,
RESOURCE MANAGER, SOFTBIOS
|
Windows*XP
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset,
Intel(R) 915GM Express Chipset, Intel(R) 915G Express Chipset, Intel(R)
955GM Express Chipset
|
|
Resolution Description:
Root Cause: CUI-Driver Compensation interface
did not comprehend SDVO encoder limitations.
Fix Description: As part of scalar RCR implementation
needed for BWG, CUI-driver interface was re-hauled to comprehend SDVO
encoder limitations. For more
details refer to scalar HLD.
|
|
BugID: 1765398
|
CRB will
not enter S3 with ADD card installed. (SI and Chrontel)
|
AIM,
SOFT BIOS
|
Windows*XP
|
BROADWATER
|
|
Resolution Description:
Root Cause: Changes required from both System
BIOS and driver.
Fix Description: This fix require both System BIOS and
driver changes. Latest System BIOS contains these fixes.
|
|
BugID: 1941431
|
This
patch is needed to avoid missing display issue with CH7312.
|
AIM
|
Windows*XP
|
Intel(R) 945G Express Chipset
|
|
Resolution Description:
At a
particular temperature range the mode set call fails for CH7312 due to some
instability in the circuit. Chrontel has given a workaround for this issue
and they have tested it in their labs for some 2000 mode changes and it
works perfectly. The workaround has been implemented in the driver and a
test driver was sent out to US
team for validating the fix and we got a positive response from them saying
that the workaround fixes the issue.
|
|
BugID: 1942935
|
During
3D test of Windbag, SOD occurs.
|
D3D
|
Windows*XP
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset,
Intel(R) 915GM Express Chipset, Intel(R) 915G Express Chipset,
|
|
Resolution Description:
Root Cause: After a context switch, stale
indirect state pointers were being accessed.
Fix Description: Bug fix to make sure the indirect state
block is not deleted until the new indirect state command + primitive +
Stored WORD is complete. This ensures the hardware has a valid pointer in
case a MI_SETCONTEXT is pending.
|
|
BugID: 1946475
|
D3D
Multiple Test Failures.
|
D3D
|
Windows*XP, Windows*XP-64
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express
Chipset, Intel(R) 915GM Express Chipset, Intel(R) 915G Express Chipset
|
|
Resolution Description:
Root Cause: There was an "if"
statement using the wrong operator to do the comparison.
Fix Description: Change operator from the "=" to
"==".
|
|
BugID: 1716746
|
Purple
line appears on the screen while playing WinDVD in 8 bit.
|
DD
|
Windows*XP
|
Intel(R) 945G Express Chipset
|
|
Resolution Description:
Root Cause: One pixel short in both width and
height values passed to the overlay destination register. To get the
distance from the subtraction between two ends, one unit should be added
back to the distance.
Fix Description: Add one unit to both width and height
values before passing to the overlay destination register.
|
|
BugID: 1947009
|
In
Extended mode, when changing primary display device Color depth, second
display device screen cannot extend.
|
GIG,
SOFT BIOS
|
Windows*XP
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset,
Intel(R) 915GM Express Chipset, Intel(R) 915G Express Chipset, Intel(R)
955GM Express Chipset
|
|
Resolution Description:
Root Cause: SoftBios internally uses the
GMCH_CONFIG data which is supposed to be up-to-date. In this case it
receives a call to enable VGA on PipeB due to which it internally disabled
plane A & B. Now GMCH config will say PipeA has NULL_PLANE and PipeB has
VGA plane. Later it receives a call
to set new mode in pipeB. It does not receive any call in PipeA to set last
mode. So the internal GMCH config data will be out of sync.
Fix Description: Softbios GAL layer disables secondary
plane as part of enabling VGA plane. This resulted in a GDI WA where they
used to forcefully enable secondary plane during mode set on primary. A
better fix would be to do this within Softbios GAL layer where it exactly
knows that it disabled secondary plane & hence should re-enable it when
coming out of VGA mode. Even with this, there will be a slight flicker on
secondary since plane transitions are occuring display plane->vga plane(blank screen)->display plane. This flicker is
the same as it occurs with current code base.
|
|
BugID: 1818717
|
Monitor
device suspend issues with Calistoga GAFF A2.
|
SOFTBIOS
|
Windows*XP, Windows*2000
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
There is
a pixel stall coming from dpiounit which is being shut off when the Port is
turned OFF. Note that the Display Plane and Pipe are still turned ON and
the display fifo is being drained in an accelerated fashion as the port is
turned OFF. This causes an underrun (real underrun) finally. This happens
even with FBC shut off. Display h/w
has hooks to recover, but the Decompressor does not recover if FBC is
turned.
Fix Description: Due to the underlined condition, this was
considered as a WA. So a WA flag (WaDisablePlaneForMonitorOff) was defined
in the WA table which will be set only for Calistoga. Issue is not validated/reported on Alviso & hence WA will not be
enabled on platforms other than Calistoga. If this WA flag is set, SetPortPowerState() interface of GMCH will be overloaded
by GMCHNAPA_SetPortPowerState(). This method informs port controller of
power state change (default implementation) and will turn off display
planes assigned to the pipe driving the input port, ulPort. This will be
done if there are no enabled ports on the pipe. If there is one, then we
don’t need this WA as per the statement above. Similarly on monitor turn
on, it will enable planes as required.
|
|
BugID: 1737132
|
Corruption
is displayed momentarily after resuming from Hibernation (S4).
|
MINIPORT
|
Windows*XP, Windows*2000
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express
Chipset, Intel(R) 915GM Express Chipset
|
|
Resolution Description:
Root Cause: When the adapter comes out of
hibernation, it again maps (temporarily) the GTT so that it points to
contiguous pages in the Stolen Memory.
By writing the pre-hibernate values to the GMADR it restores the
contents of the Stolen Memory. It
also restores back the pre-hibernate entries in the GTT Table. But at the
time the driver is called to come out of hibernate, the VBIOS has already
put the adapter and the child devices to PowerON state – so as to display
the POST screen. At this time the VBIOS is using the Stolen Memory as the
frame buffer. It also sets up displays in VGA Mode. The Displays are
enabled and hence restored Stolen Memory values are displayed onto the
screen –the display corruption.
Fix Description: The fix provided will turn off the display
data fetches and disable video output, before the stolen memory is
restored. Since the display devices are in VGA mode, the “VGA registers”
can be used to achieve this. The VGA’s sequencer register – ‘SR01 Clocking
Mode’ will be used to turn the Screen Off.
|
|
BugID: 1753301
|
Corruption
is displayed momentarily after resuming from Hibernation (S4).
|
MINIPORT
|
Windows*XP
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset,
Intel(R) 915GM Express Chipset
|
|
Resolution
Description:
Root Cause: Same
source fix as Tibet 1737132. Fix corruption during mode changes.
Fix
Description:
|
|
BugID: 1766809
|
Corruption
is displayed momentarily after resuming from Hibernation (S4).
|
MINIPORT
|
Windows*XP
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset,
Intel(R) 915GM Express Chipset
|
|
Resolution
Description:
Root Cause: Same
source fix as Tibet 1737132. Fix corruption during mode changes.
Fix
Description:
|
|
BugID: 1765697
|
Setup
falls into infinite loop upon completing installation phase.
|
MINIPORT
|
Windows*XP
|
LONGHORN
|
|
Resolution Description:
Root Cause: While installing the Vista OS on
GDG system with ADD2 card the installation hangs. There was a fix provided
for this similar issue last year and later on when the changes for CTit was
made X64 specific and was not getting executed for x32.
Fix
Description:
|
|
BugID: 1738090
|
Cannot
play WinDVD when setting color depth as 8 bit.
|
RESOURCE
MANAGEMENT
|
Windows*XP
|
Intel(R) 915G Express Chipset
|
|
Resolution Description:
Root Cause: The render core clock and display
core clock values on GDG were both 333MHz. However, since the value passed
to BEMP for display core clock is 200, and the dotclock of 1600 X 1200 @ 75
Hz was falling within in the 10% range, BEMP was invalidating the request
for overlay creation.
Fix Description: (1) Modified the initialization section of
GDG only to read the display core clock and render core clock frequency
from GCFGC and assign the values to BEMP appropriately. (2) Also corrected the define for render clock position (RNDRCLK_BIT_POS
and RNDRCLK_BWG_BIT_POS) to indicate the appropriate shift. This was
wrongly assigned a different value earlier.
|
|
BugID: 1764408
|
Cannot switch
display to TV when connected via AverMedia CX25905 ADD2 card.
|
AIM
|
Windows*XP
|
BROADWATER
|
|
Resolution Description:
Root Cause: Interrupts are handled based on the
condition check on platform in kchisr.c.
Fix Description: Modified the conditions to handle the
Broadwater platform as well.
|
|
BugID: 1765396
|
Cannot switch
display to TV when connected via AverMedia CX25905 ADD2 card.
|
AIM
|
Windows*XP
|
BROADWATER
|
|
Resolution Description:
Root Cause: Same source fix as Tibet
1764408.
Fix
Description:
|
|
BugID: 1946970
|
Changing
the resolution in 180 degree rotated mode will cause display corruption.
|
ROTATION
|
Windows*XP
|
BROADWATER
|
|
Resolution Description:
Root Cause: In 180 degree Hw rotation, the
display plane start address register is programmed with last pixel visible
in screen on non rotated orientation. This is calculated with
stPipeInfo.rclScreenRect.right and stPipeInfo.rclScreenRect.bottom. These
values needed to be updated in pSharedInfo before doing this calculation.
Else the value for the previous mode will persist which will lead to
corruption.
Fix Description: Values are updated in RMUTIL.c.
|
|
BugID: 1702259
|
Invalid
label in GfxBugcheckCallback dump data.
|
MINIPORT
|
Windows*XP, MCE, TABLET PC
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset,
Intel(R) 915GM Express Chipset, Intel(R) 915G Express Chipset, Intel(R) 955GM
Express Chipset
|
|
Resolution Description:
Root Cause: Currently in debug.c we have two
“IGF7” labels, one pointing to Power Management and another pointing to Memory
Buffer, which causes problem to automate the formatting of .enumtag
data.
Fix Description: Renaming the second “IGF7” label to “IGF8”
label and updating the version number of the header as mentioned. Things to
be considered while modifying Bug Check data: (1) Every Label in Bug Check
data has to be unique. Duplication
of labels leads to problem in separating out data through tools. (2) On
every update to the Bug Check data the version number of the header should
be incremented by 1.
|
|
BugID: 1944238
|
Display
will exchange after undocking then hot docking with extended mode enabled.
|
MINIPORT
|
Windows*XP
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: Miniport Driver notifies CUI
about the Dock vent in VALIDATE_CHILD_IOCTL. During physical dock/undock we
are getting some SET MODE calls before VALIDATE_CHILD_IOCTL. During these
SET MODE calls, CUI persistence registries get overwritten with the new
configuration (LFP+CRT in case-1). So, now when the actual dock
notification comes through VALIDATE_CHILD_IOTCL, driver will notify CUI
about dock event. But since CUI
persistence is already overwritten with (LFP+CRT) in case-1 the display
will go to wrong configuration i.e. LFP+CRT in Extended Desktop.
Fix Description: We need a mechanism to handle dock/undock
event irrespective of the order in which SET_MODE call or
VALIDATE_CHILD_IOCTL is received. To do this we will notify CUI about the
dock event if it is found during SET_MODE call.
|
|
BugID: 1941300
|
Garbage is
displayed on HDTV and LFP in DDC.
|
MINIPORT
|
DOS
6.22
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: When we open lid, Event Manager chooses
LFP+TV (Clone) as the next configuration. Since we are in FSDOS we can
drive only SPSD or twin and so we convert LFP + TV (Clone) to LFP+TV(Twin) as the next configuration. However, LFP+TV (Twin) is an invalid
combination hence causing garbage on TV.
Softbios used to take care of this by a WA which will drive only LFP
even if Miniport sends LFP+TV(Twin) as the
configuration to be driven since LFP+TV is invalid. But in new SB, this WA is missing and
hence we see the problem.)
Fix Description: During FSDOS switching, after converting
clone combination to twin, validate the Twin Configuration before sending
it to SB. If the (Twin)
configuration is not valid, call SB with only primary device in SPSD.
|
|
BugID: 1943044
|
MV
signals are seen for 720p-standard when you run MV enabled DVD on HDTV.
|
SOFTBIOS
|
Windows*XP
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: Issue happens because TV std from the registry was
assigned to dwTVStandard. This is
due to incorrect check while updating the dwTVStandard.
Fix Description:
|
|
BugID: 1943462
|
The
video standard is changed from HDTV_480i59 to NTSC_M on HDTV after resuming
from Suspend state.
|
TVOUT
|
Windows*2000
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: This issue happens only after
fresh installation OS because DAC state is initialized to s-video by
default during resume from s3/s4.
Active detection is required during resume from standby/hibernation
because detection set mode call will enable the encoder with s-video and
never go to active detection and it will detect as
a s-video instead of component.
Fix Description:
|
|
BugID: 1684292
|
Fixes
for Issues 1738922 and 1684292.
|
SOFTBIOS
|
Windows*XP
|
Intel(R) 915GM Express Chipset,
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: Int10 functionality in new SB was
not implemented.
Fix Description: As per the RCR 211835, the following
functions are added (1) 5F14:078Fh and (2) 5F14:078Dh in the new SoftBios.
|
|
BugID: 1939671
|
TV
format was not saved to CMOS .
|
SOFTBIOS
|
Windows*XP
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset,
Intel(R) 915GM Express Chipset, Intel(R) 915G Express Chipset, Intel(R)
955GM Express Chipset
|
|
Resolution Description:
Root Cause: When TV standard is changed, SMI
call to “set TV standard and connector” should be called. This function
call is missing. Therefore, the TV standard value was not updated in CMOS.
Fix Description: 1) Modified data structure
TVSTANDARDANDVIDEOCONNECTOR_SET to contain only those fields that are
required. 2) Added the call to the function that will generate SMI call to
update TV standard and video connector. 3) Made updates to the
“setTVstandardandVideoConnector” interface to ensure compliance with SMI
specs (1.3, 1.3A, 1.3C).
|
|
BugID: 1940035
|
Vsync
pulse width at 1080i is set to 3 lines. Correct width is 5 lines.
|
SOFTBIOS
|
Windows*XP
|
Intel(R) 945G Express Chipset
|
|
Resolution Description:
Root Cause: The Vsync pulse width as
calculated from DTD in the EDIDPARSER_GetTimingFromDTD functions is not
doubled for interlaced modes. This was resulting in the Vsync pulse width getting
halved for 1080i mode. Also, the Vsync end value in the static timing info
for 1080i was not programmed correctly to output a pulse width of 5 Hsync
pulses.
Fix Description: 1) Added code to double the Vsync pulse
width for interlaced modes in the EDIDPARSER_GetTimingFromDTD method. 2)
Changed the V sync End value from 0x1088 to 0x1093 for 1080i_@50 and
1080i_@60 modes in GlobalTimings.c.
|
|
BugID: 1704970
|
[ADD2]
There are two Digital Displays on Display Devices.
|
SOFTBIOS
|
Windows*XP
|
Intel(R) 945G Express Chipset
|
|
Resolution Description:
Root Cause: EDID Read of SDVO-CRT was failing
because of extra STOP Cycle in switchtoDDC2 Call. Hence, even if a CRT was
not connected, it showed it as a legacy CRT. Also, in AIMCRTEncoder.c
removed the check for VBT bit for DVI-I.
Fix Description: Look into the EDID
and decide if it is CRT or DVI.
|
|
BugID: 1765428
|
If LFP
and DFP are connected and you set display on LFP only with FSDOS full
screen with the lid closed (Set lid close to stand by) the FSDOS does not
switch to DFP at all.
|
SOFTBIOS
|
Windows*XP
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: Corrected Hiresolution multiplers properly.
Fix
Description:
|
|
BugID: 1946001
|
SMI
call logs are all wrong.
|
SOFTBIOS
|
Windows*XP
|
Intel(R) 915GM Express Chipset
|
|
Resolution
Description:
Root Cause:
Fix Description:
|
|
BugID: 1765396
|
Cannot
switch display to TV when connected via AverMedia CX25905 ADD2 card
|
SOFTBIOS
|
Windows*XP
|
Intel(R) 915GM Express Chipset
|
|
Resolution Description:
Root Cause: With latest driver display
switches to TV. But display corruption is seen because of improper
programming of the following registers. Bit 9:12 (clock phase) should be
programmed to 9 in Broadwater. Bit 3:4 in sdvo port (hsync polarity and
vsync polarity). These bits are newly introduced in Broadwater. These bits
should be set based on timing structure (DTD) given by the encoder. Since
this is newly introduced, some encoders are not giving proper values in the
DTD. (DTD’s are generated through CreatePreferredTiming opcodes) Hotplug
Support: KCH enables Hot-plug support only for Lakeport. Modified the conditions to include
Broadwater also. Updated dot clock ranges for setting proper MNP values
(corrected according to Broadwater B-Spec.)
Fix Description: Corrected the mentioned issues based on
Broadwater Bspec.
|
|
BugID: 1798293
|
Restore
Defaults button is always active in TV settings page.
|
CUI2
|
Windows*XP
|
Intel(R) 945G Express Chipset
|
|
Resolution Description:
Root Cause: After clicking on restore
defaults, if the advanced TV page is opened, the value in DACMODERGB,
DACMODEYC etc does not match with the default values.
Fix Description: When checking for default values to grey
out the restore defaults button, there is no need to check for DACMODERGB,
DACMODEYC etc which are connector types and not used in CUI.
|
|
BugID: 1947782
|
Help Tip
is not seen when you righ click on "Close" button in information
page in CUI.
|
CUI2
|
Windows*XP
|
Intel(R) 915GM Express Chipset
|
|
Resolution Description:
Root Cause: Help was not called for
information page close button. Ported the code.
Fix
Description:
|
|
BugID: 1947007
|
Tab is
getting disabled after applying the changes to Overlay Settings in CUI.
|
CUI2
|
Windows*XP
|
Intel(R) 945GM Express Chipset
|
|
Resolution Description:
Root Cause: When the focus to the dialog is
lost, then all messages to the dialog will not go to a proper control in
the dialog.
Fix Description: When the focus is lost set the focus back
again.
|
|
BugID: 1766052
|
MV
signals are seen for 720p-standard when you run MV enabled DVD on HDTV.
|
AIM,
CUI2
|
Windows*XP
|
Intel(R) 915GM Express Chipset, Intel(R) 945GM Express Chipset, Intel(R) 915G Express Chipset, Intel(R) 945G Express Chipset
|
|
Resolution Description:
Root Cause: This is a cross-component issue. During
driver initialization after reinstalling, because of the problem in a
condition in function UpdateDefaultTVStandard(). The default value of 480p60 is assigned
to the TV standard in AIM module. This leads to programming the card with
the same value thereafter. Even on rectifying this problem, the value of TV
standard is again changed in CUI module. This is because the value of TV
standard before reinstalling the driver is stored in registry. This value
is assigned to the TV standard without checking against the available
standards list provided by AIM to CUI.
Fix Description: Rectified the condition in UpdateDefaultTVStandard() function to make sure that
correct value is assigned to the TV standard. In CUI added a check to
verify that the TVStandard value to be set is compared with the available
standards.
|
|
Issues Resolved in 4453
|
|
Reference No.
|
Description
|
Affected Component(s)
|
Affected OS(s)
|
Affected Project(s)
|
|
BugID: 1579422
|
Unable
to Apply new color Setting with CRT and DFP in Twin Mode.
|
CUI2
|
WINDOWS* XP
|
INTEL(R)
945G EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: For twin configuration, the
primary/Secondary devices concept is not used, so we should not treat the
devices connected as two seperate devices as they are connected to a single
pipe.
Fix Description: Fixed the issue
by updating the Builder structure only for one device.
|
|
BugID: 1740184
|
The
created schemes disappears in DTCM \ Scheme submenu after setting CRT+EFP Extended
scheme with CRT at 90 degrees view and then setting CRT+EFP DDC 90 degrees
scheme.
|
CUI2
|
WINDOWS* XP
|
INTEL(R)
945GM EXPRESS CHIPSET, INTEL(R) 945G EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: Check for validity of schemes
failed.
Fix Description: Removed schemes
code based on PRD and updated files.
|
|
BugID: 1701635
|
IGDI (Intel
Graphics Driver Installer) Command Line Option does not work correctly.
|
MINIPORT
|
WINDOWS* XP
|
INTEL(R)
915GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: 1) The driver is not reading the
installer keys in case of a driver upgrade. 2) The driver is not writing to
proper place in case of driver upgrade as well as fresh install.
Fix Description: 1) The driver
reads the installer keys for driver upgrade as well fresh install. 2) The
registry in “HKLM\System\CurrentControlSet\Hardware
Profiles\Current\System\Current-ControlSet\Services\iAlm\Device0\Mon(display device number)" is written to for all
devices that were active at boot time and the display configuration
registry is also appropriately updated.
|
|
BugID: 1738782
|
75 Hz
refresh rate cannot be applied to CRT when the CRT was in DDC LFP+CRT.
|
CUICOM
|
WINDOWS* XP
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: Primary RR is copied into
Secondary RR. So Primary RR(60hz) is assigned for
secondary also and hence the issue.
Fix Description: 1. Use the return
value from GetValidateAdviseCfgMode only if Validation fails. 2. Copy the
Primary values from driver to Primary and secondary values to secondary
(when validation fails and advise passes).
|
|
BugID: 1703673
|
Divide
by zero exception error.
|
MINIPORT
|
WINDOWS* XP
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: pModeTable->ScreenWidth and
pModeTable->ScreenHeight were zero which caused a divide by zero
condition.
Fix Description: Added checks to
handle such conditions gracefully.
|
|
BugID: 1742058
|
WinDVD
5.0.11.818 - Video corruption in MCE and in WinDVD w/ VLD On.
|
DVD
|
WINDOWS* XP
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: HW cannot accept the slice data
within one DWORD.
Fix Description: Work Around:
Shift the slice data to make it cross DWORD boundary.
|
|
BugID: 1741407
|
DPST
setting changes to default after disable/enable this function.
|
CUI
|
WINDOWS* XP, WINDOWS* 2000
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: Minimum value was updated wrong
in CUI.
Fix Description: Fixed it
appropriately.
|
|
BugID: 1697484
|
After
Resume from the standby, Primary and Secondary display of EDS configuration was swaped.
|
MINIPORT
|
WINDOWS* XP
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: The issue is caused by GDI
limitation in switching from EDS to EDS in certain cases. One such case is when we are in CRT+DFP
(ED) with lid closed and pipe B assigned to DFP. So, now on lid open event if we select
LFP+CRT(ED) as the next configuration, following possible sequence of
SET_MODE calls can cause the problems.
Fix Description: Modifying the
rule for LID_OPEN as follows: ALWAYS->GO TO LFP + X IN Extended Desktop.
PRIMARY LOST->NO RULE (rule has no effect since there exists a valid
rule for ALWAYS case). SECONDARY LOST->NO RULE (rule has no effect since
there exists a valid rule for ALWAYS case). BOTH LOST->NO RULE (rule has
no effect since there exists a valid rule for ALWAYS case).
|
|
BugID: 1706215
|
When
resuming from S3/S4 with CRT connection, the LCD blinks.
|
CUI2
|
WINDOWS* XP
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: When resuming back from S3/S4,
initial configuration is applied. With persistence, configuration is read
from registry and is applied. If the config is the same, it results in
blink.
Fix Description: Added a check to
see if the config read from registry is same as applied configuration. If so,
the read config is NOT reapplied.
|
|
BugID: 1940397
|
Hotkeys
are getting "disabled" before applying in CUI.
|
CUI2
|
WINDOWS* XP
|
INTEL(R)
945G EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: The hotkeys were getting
registered even if you click on cancel.
Fix Description: Made a change in
a condition to make sure hotkeys are not registered when the application is
exiting.
|
|
BugID: 1909158
|
BSOD at
ialmrnt5 when launching TVfunSTUDIO after power-on.
|
SOFTBIOS
|
WINDOWS* XP
|
INTEL(R)
915G EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: Instead of using ulPipe, we are
using pThis->m_ulPipeInUse. Due to this, array becomes out of bound and system
blue screens. Fix: corrected m_ulPipeInUse to ulPipe.:
|
|
BugID: 1698398
|
System
takes a long time to come up after resume from S3.
|
SOFTBIOS
|
WINDOWS* XP
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: 1) Wait for Vblank times out a
number of times during resume from S3. Wait for Vblank called from various functions
in GAL, more often for register update and during pipe disable. However,
this wait is not required when VGA plane is enabled, since double-buffering
is bypassed if VGA native is enabled, allowing pipe to shut-off
immediately. 2) Wait for pipe disable timeouts during resume from S3. Wait
for pipe disable is called after pipe disable, where we need to wait for
the vertical counter to stop to ensure pipe is completely turned-off. There
has been a bit of uncertainty as to the right logic to ensure pipe is
completely turned off. The current logic looks for the scanline counter to
be equal to VblankStart. But it has been observed that this wait times out
sometimes and scanline counter values are not incrementing to reach
VblankStart after pipe is disabled. A much better approach is to check
whether scanline counter values are incrementing after each horizontal
refresh time (maximum horizontal refresh time possible) and wait until it
stops. Implementation of this logic has not resulted in any timeouts and also
an improvement in resume time. Fix
Description: 1) Added the check
to return TRUE if VGA plane is enabled on pipe, before waiting for Vblank
in NAPAPIPE_WaitForVBlank. 2) Added the check to bypass wait for pipe
disable if VGA plane is enabled on pipe, after pipe is disabled in
NAPAPIPE_Disable. 3) Modified the NAPAPIPE_WaitForPipeDisable function to
implement the new logic.
|
|
BugID:
1940490
|
Position
icon does not get grayed out even after it reaches the extremes.
|
CUI2
|
Windows* XP
|
INTEL(R)
945G EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: Control ID's was changed.
Fix Description: Corrected the
control ID's to MCCS page ID's.
|
|
BugID:
1939497
|
TV
Settings display will shift right when we hit left.
|
CUI2
|
Windows* XP
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: Default value is not a multiple
of the step size returned, hence we were
overshooting the max size or going to a negative value when moving.
Fix Description: Added checks to
prevent this from happening.
|
|
BugID: 1777529
|
Fn+F7
function does not work properly after resume from suspend.
|
SOFTBIOS
|
Windows* XP
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: While resuming back from S3/S4
the scratch register 71410 was not getting updated. The system bios depends
on the Bits 26-24(of 71410) to decide the next display combination for
switching; since the register was not getting updated the various display
combination to switch was not consistent with the combinations possible
when we do a fresh boot.
Fix Description: Restoring the
upper 16bits of 71410 only in BASEMVBIOSHANDLER_PostSetAdapterPowerState.
Added a mask based restoration function in MMIOReg.c file for the same.
|
|
BugID: 1766155, 1777522, 1777529, 1939607,
1940004
|
Unsupported
LCD 60Hz refresh rate appear on Intel CUI and OS user interface.
|
SOFTBIOS
|
Windows* XP
|
INTEL(R)
915GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: The LFP EDID has 1024x768@60Hz
bit set in established timing. The DTD supports 10x7 @50 and 40 Hz. The
expected behavior is to have only DTD timings being displayed. Hence
anything in EDID other that DTD should not be considered as timing
supported for LFP.
Fix Description: 1) Added
INTLVDSENCODER_IsTimingSupported to prune modes not supported in DTD. 2) In
MODESMANAGER_BuildPrunedCloneModeTable, we added check for
ModeListNorPrimary also, else if display 1 supports 60 Hz only and display2
supports 50 Hz only then the number of modes on clone mode list added were
null.
|
|
BugID: 1942663
|
HDTV
standard not getting updated on CUI.
|
CUI2
|
Windows* XP
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: In Clone, when the HDTV is on
secondary and in primary if we change a mode MainDlg::ClonePagesValueSwapper()
function is called and there if the current mode supports the existing
format, we should not do a format switch.
Fix Description: If the current
format supports the selected mode then we retain the same format in
MainDlg::ClonePagesValueSwapper(() function.
|
|
BugID: 1634078
|
OpenGL
API failed in resolutions higher than 1400x1050
|
OGL
|
Windows* XP
|
INTEL(R)
915GM EXPRESS CHIPSET
|
|
Resolution Description:
Roor Cause: The buffer region was limited by
the viewport which was not properly set so at higher resolutions it was not
large enough and failed to create the buffer region.
Fix Description: Properly set the viewport size
for NAPA and
Gen4 and removed buffer region's dependancy on the viewport size.
|
|
BugID: 1740003, 1941553
|
Hotkey/CUI
does not work when cold boot without CRT or TV.
|
SOFTBIOS
|
Windows* XP
|
INTEL(R)
945GM EXPRESS CHIPSET
|
|
Resolution Description:
Root Cause: SMI 1.3a and 1.3c spec have inconsistency in specifying
how the supported version is interpreted.
Fix Description:
Check the difference
in the 1.3 & 1.3 Update A versions and include 1.3 Update ‘A’
information in 1.3
|
|
Issues Resolved in 4444
|
|
Reference No.
|
Description
|
Affected Component(s)
|
Affected OS(s)
|
Affected Project(s)
|
|
BugID: 1685660
|
Frame drop happens
at periodic intervals.
|
D3D
|
Windows* XP, Windows* Media Center
|
Intel(R) 915G Express
Chipset, Intel(R) 945G Express Chipset, Intel(R) 855GM Chipset
|
|
Resolution
Description:
Root Cause: Hardware Binning
was running out of memory.
Fix Description: A check
needs to be made to see if another application is flipping without the D3D
driver getting notified to FlushBuffers. Commands could get queue by the
D3D applications that will cause a stutter of the other app that is trying
to flip. A forced flush of the D3D
context will prevent that. Additional checks are added to make sure a
premature fallback isn't done by checking to see if there are any buffered
primitives. Also checks will be done in the BLT code to make sure this
heuristic is only used when doing presentation BLTs to the primary.
|
|
BugID:
1740184
|
The
created schemes disappear in DTCM \ Scheme submenu after setting CRT+EFP
EXTD scheme with CRT at 90 degree view and then setting CRT+EFP DDC 90 degree
scheme.
|
CUI2
|
Windows* XP
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset
|
|
Resolution
Description:
Root Cause: Check for validity of schemes failed because of swapModesForSchemes
() check and scheme entries for secondary devices issue in SCHEME_VALIDATE.
Fix Description: Removed schemes code based on PRD and
updated files.
|
|
BugID:
1738961
|
Desktop corrupts
when repeating to change between window mode and full screen of DirectX9
sample HLSLwithoutEffects.
|
ROTATION
|
Windows* XP, TABLET PC
|
Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset
|
|
Resolution
Description:
Root Cause: When user presses Alt+Enter to toggle the application
from FULL SCREEN to WINDOWED MODE, Application will call
DdDestroySurface32() call to FLIP BUFFERS. Call to flip may fail if the H/W
is still doing the flip previously issued. Rotation driver needs to handle
this case before actually issuing a call for flip.
Fix Given: Added code to check the flip
status for the last flip issued to H/W. After H/W completes the flip, next
flip will be issued.
Fix Description:
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BugID:
1764394
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The 75Hz
of 1280x960 resolution cannot be found when connecting legacy CRT .
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SOFTBIOS
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Windows* XP
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Intel(R) 915GM Express Chipset, Intel(R) 945GM Express Chipset, Intel(R) 945G Express Chipset
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Resolution
Description:
Root Cause: Typo in GlobalTimings.c line 1082. Instead of
1280x960@70, it should be 1280x960@75.
Fix Description: Corrected it from 70 to 75.
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BugID:
1764094
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Video
Distortion at 800x600 and 1152x864 on 2405FPW when mode is set through
Windows Display Properties.
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RESOURCE
MANAGER
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Windows* XP
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Intel(R) 945GM Express Chipset
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Resolution
Description:
Root Cause: When maintain aspect ratio is selected, CUI sends
SET_COMPENSATION to GDI, and hence to SOFTBIOS, where the best Aspect Ratio
timing is found and is programmed to the GMCH register. This change in
timing is not notified to RM->KCH, and hence the issue,
because of improper watermark value.
Fix Description:
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BugID:
1737242
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The TV position
is not centered after changing the position and restoring position to
center then switching video standards.
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TVOUT
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Windows* XP
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Intel(R) 945GM Express Chipset
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Resolution
Description:
Root Cause: As the maximum shift size of the window takes an odd
value for some TV standards, the center size is not exact half of the
maximum size. This leads to an error in position percentage.
Fix Description: The maximum size has been changed from odd
to even (whereever applicable eg. PALB, PALD etc.), so the position
percentage for the center is an exact 50% and the centering button is
grayed out.
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BugID:
1753654
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CMOS
setting for TV format does not take effect.
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SOFTBIOS
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XP
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Intel(R) 915GM Express Chipset, Intel(R) 945GM Express Chipset, Intel(R) 915G Express Chipset, Intel(R) 945G Express Chipset
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Resolution
Description:
Root Cause: 1) The TV standard read from the CMOS through SMI call
is converted from SMI TV standard to Microsoft TV standard (there are two
different sets of constants corresponding to the SMI and Microsoft values
for TV standards). This Microsoft TV standard is passed to the function
that determines the TV standard to be set. However, this function expects
the SMI TV standard as an input. Therefore, this leads to incorrect
behavior. 2) The call to getTVStandardAndVideoConnector returns a BOOLEAN
value. However, the return value was incorrectly being interpreted as value
of TV standard.
Fix Description: 1) Modified data structure
TVSTANDARDANDVIDEOCONNECTOR_GET to contain fields for MS TV standard as well
as SMI TV standard. GetRegistryObject uses the MS TV standard, while
GetOptionsObject uses SMI TV standard, from the same data structure. 2)
Changed code to handle return value from getTVStandardAndVideoConnector
correctly.
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BugID:
1765390
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Desktop
screen collapses to the left.
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SOFTBIOS
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Windows* XP
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Intel(R) 915GM Express Chipset, Intel(R) 945GM Express Chipset, Intel(R) 915G Express Chipset, Intel(R) 945G Express Chipset
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Resolution
Description:
Root Cause: Issue is happening since 14.19 driver (new Softbios)
respects SMI returned panel index value properly. Here the SMI/CMOS panel index
is 7 (1600x1200) whereas the one set in VBT is 10 (1280x800). Since CMOS
value takes priority new SB considers this as a 16x10 panel.
Fix
Description: SW WA added so that CMOS returned
panel preference will not be looked into if the panel does not have EDID.
This is similar to old SB code. Once this was done, display comes up but
panning does not work. This was because OEM is adding 1280x800 mode in customizable mode and this overrides the DTD
entry in the mode table. All OEM customizable modes were added with InEDID
flag set to FALSE. Hence this will result in a mode table with 0 mode
entries having mode in EDID flag set. So max panel resolution logic breaks.
This is fixed by preserving the InEDID flag and Preferred mode flag in mode
table if mode entry is already present. Even with this 1280x800, the native
resolution of this panel does not come up when OS hide modes checkbox is
selected. This was due to the monitor range dotclock value which was less
by 1. Here the panels dotclock is 68419998. This results
in the range limitdotclock value to be computed as 6, but as per EDID spec
we have to first convert 68419998 to a value divisible by 10MHz, and then
divide by 10MHz. So the actual value should be 7. By doing so, 1280x800
will come up.
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BugID:
1765435
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DFP
display goes blank when the high resolution DFP is replaced with low
resolution DFP after the LID close event.
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CUI2
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Windows* XP
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Intel(R) 945GM Express Chipset
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Resolution
Description:
Root Cause: When unplugging the high resolution DFP and plugging in
a low resolution DFP when doing an EDS, we got the modes which were valid
on the high resolution DFP, hence the low resolution DFP was blanking out
(Image broken). When putting another EDS call we can get proper modes from
the driver, this EDS refreshed the mode cache. Now when doing an EDS for a
second time, we get the modes which are applicable for the low resolution
DFP and we apply one of these modes, hence the blank out does not happen.
Fix Description:
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